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19-3404; Rev 0; 9/04
KIT ATION EVALU ABLE AVAIL
LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements
General Description
The MAX2016 dual logarithmic detector/controller is a fully integrated system designed for measuring and comparing power, gain/loss, and voltage standing-wave ratio (VSWR) of two incoming RF signals. An internal broadband impedance match on the two differential RF input ports allows for the simultaneous monitoring of signals ranging from low frequency to 2.5GHz. The MAX2016 uses a pair of logarithmic amplifiers to detect and compare the power levels of two RF input signals. The device internally subtracts one power level from the other to provide a DC output voltage that is proportional to the power difference (gain). The MAX2016 can also measure the return loss/VSWR of an RF signal by monitoring the incident and reflected power levels associated with any given load. A window detector is easily implemented by using the on-chip comparators, OR gate, and 2V reference. This combination of circuitry provides an automatic indication of when the measured gain is outside a programmable range. Alarm monitoring can thus be implemented for detecting high-VSWR states (such as open or shorted loads). The MAX2016 operates from a single +2.7V to +5.25V* power supply and is specified over the extended -40C to +85C temperature range. The MAX2016 is available in a space-saving, 5mm x 5mm, 28-pin thin QFN.
Features
Complete Gain and VSWR Detector/Controller Dual-Channel RF Power Detector/Controller Low-Frequency to 2.5GHz Frequency Range Exceptional Accuracy Over Temperature High 80dB Dynamic Range 2.7V to 5.25V Supply Voltage Range* Internal 2V Reference Scaling Stable Over Supply and Temperature Variations Controller Mode with Error Output Available in 5mm x 5mm 28-Pin Thin QFN Package *See Power-Supply Connection section.
MAX2016
Ordering Information
PART MAX2016ETI MAX2016ETI-T MAX2016ETI+D TEMP RANGE -40C to +85C -40C to +85C -40C to +85C PINPACKAGE PKG CODE
28 Thin QFN-EP*, T2855-3 bulk 28 Thin QFN-EP*, T2855-3 T/R 28 Thin QFN-EP*, T2855-3 lead free, bulk 28 Thin QFN-EP*, T2855-3 lead free, T/R
Applications
Return Loss/VSWR Measurements Dual-Channel RF Power Measurements Dual-Channel Precision AGC/RF Power Control Log Ratio Function for RF Signals Remote System Monitoring and Diagnostics Cellular Base Station, Microwave Link, Radar, and other Military Applications
MAX2016ETI+TD -40C to +85C
*EP = Exposed pad. + = Lead free. D = Dry pack.
Pin Configuration
OUTB 23 OUTA SETB SETA REF 28 FA1 VCC RFINA+ RFINAGND COUTH CSETH 1 2 3 4 5 6 7 8 COR 9 VCC 10 SETD 11 OUTD 12 VCC 13 FV2 14 FV1 27 26 25 24 22 21 FB1 20 VCC 19 RFINB+ FB2 18 RFINB17 GND 16 COUTL 15 CSETL FA2
RF/IF Power Amplifier (PA) Linearization
MAX2016
Typical Application Circuit appears at end of data sheet.
THIN QFN
________________________________________________________________ Maxim Integrated Products
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LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements MAX2016
ABSOLUTE MAXIMUM RATINGS
VCC to GND .........................................................-0.3V to +5.25V Input Power Differential (RFIN_+, RFIN_-)......................+23dBm Input Power Single Ended (RFIN_+ or RFIN _-) .............+19dBm All Other Pins to GND.................................-0.3V to (VCC + 0.3V) Continuous Power Dissipation (TA = +70C) 28-Pin, 5mm x 5mm Thin QFN (derate 35.7mW/C above +70C)..................................................................2.8W Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(VCC = +2.7V to +3.6V, R1 = R2 = R3 = 0, TA = -40C to +85C, unless otherwise noted. Typical values are at VCC = +3.3V, CSETL = CSETH = VCC, 50 RF system, TA = +25C, unless otherwise noted.) (Note 1)
PARAMETER POWER SUPPLY Supply Voltage Total Supply Current Supply Current INPUT INTERFACE Input Impedance Input Resistance DETECTOR OUTPUT Source Current Sink Current Minimum Output Voltage Maximum Output Voltage Difference Output VOUTD OUTD Accuracy COMPARATORS Output High Voltage Output Low Voltage Input Voltage Input Bias Current REFERENCE Output Voltage on Pin 25 Load Regulation RLOAD 2k Source 2mA 2 -5 V mV VOH VOL RLOAD 10k RLOAD 10k Measured at CSETL and CSETH CSETL and CSETH VCC 10mV 10 GND to VCC 1 V mV V nA Measured at OUTA, OUTB, and OUTD Measured at OUTA, OUTB, and OUTD Measured at OUTA, OUTB, and OUTD Measured at OUTA, OUTB, and OUTD PRFINA = PRFINB = -30dBm 4 0.45 0.5 1.8 1 12 mA mA V V V mV R Differential impedance at RFINA and RFINB Resistance at SETD Resistance at SETA and SETB 50 20 40 k VS VS ICC Measured in each pin 2 and pin 20 Measured in pin 9 Measured in pin 12 R6 = 0 R6 = 37.4 2.7 4.75 3.3 5 43 16 2 9 mA 3.6 5.25 55 V mA SYMBOL CONDITIONS MIN TYP MAX UNITS
2
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LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements
AC ELECTRICAL CHARACTERISTICS--OUTA AND OUTB
(Typical Application Circuit, VCC = +2.7V to +3.3V, R1 = R2 = R3 = 0, TA = -40C to +85C, unless otherwise noted. Typical values are at VCC = 3.3V, CSETL = CSETH = VCC, TA = +25C, unless otherwise noted.) (Note 1)
PARAMETER RF Input Frequency Range Return Loss Large-Signal Response Time RSSI MODE--0.1GHz RF Input Power Range 3dB Dynamic Range Range Center Temperature Sensitivity Slope Typical Slope Variation Intercept Typical Intercept Variation RSSI MODE--0.9GHz RF Input Power Range 3dB Dynamic Range Range Center Temperature Sensitivity Slope Typical Slope Variation Intercept Typical Intercept Variation RSSI MODE--1.9GHz RF Input Power Range 3dB Dynamic Range Range Center Temperature Sensitivity Slope Typical Slope Variation Intercept Typical Intercept Variation PRFINA = PRFINB = -27dBm (Note 4) TA = -20C to +85C (Note 5) TA = -20C to +85C TA = +25C to +85C TA = +25C to -20C (Note 2) TA = -20C to +85C (Note 3) -55 to +12 67 -27 +0.0125 -0.0125 18 -4.8 -88 0.03 dBm dB dBm dB/C mV/dB V/C dBm dBm/C PRFINA = PRFINB = -30dBm (Note 4) TA = -20C to +85C (Note 5) TA = -20C to +85C TA = +25C to +85C TA = +25C to -20C (Note 2) TA = -20C to +85C (Note 3) -70 to +10 80 -30 +0.0083 -0.0083 18.1 -4 -97 0.02 dBm dB dBm dB/C mV/dB V/C dBm dBm/C PRFINA = PRFINB = -32dBm (Note 4) TA = -20C to +85C (Note 5) TA = -20C to +85C TA = +25C to +85C TA = +25C to -20C (Note 2) TA = -20C to +85C (Note 3) -70 to +10 80 -32 +0.0083 -0.0083 19 -4 -100 0.03 dBm dB dBm dB/C mV/dB V/C dBm dBm/C SYMBOL fRF S11 CONDITIONS AC-coupled input 0.1GHz to 3GHz PRFIN = no signal to 0dBm, 0.5dB settling accuracy 20 100 MIN TYP MAX 2.5 UNITS GHz dB ns
MAX2016
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LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements MAX2016
AC ELECTRICAL CHARACTERISTICS--OUTA AND OUTB (continued)
(Typical Application Circuit, VCC = +2.7V to +3.3V, R1 = R2 = R3 = 0, TA = -40C to +85C, unless otherwise noted. Typical values are at VCC = 3.3V, CSETL = CSETH = VCC, TA = +25C, unless otherwise noted.) (Note 1)
PARAMETER RSSI MODE--2.17GHz RF Input Power Range 3dB Dynamic Range Range Center Temperature Sensitivity Slope Typical Slope Variation Intercept Typical Intercept Variation RSSI MODE--2.5GHz RF Input Power Range 3dB Dynamic Range Range Center Temperature Sensitivity Slope Typical Slope Variation Intercept Typical Intercept Variation PRFINA = PRFINB = -23dBm (Note 4) TA = -20C to +85C (Note 5) TA = -20C to +85C TA = +25C to +85C TA = +25C to -20C PRFINA = PRFINB = -25dBm (Note 4) TA = -20C to +85C (Note 5) TA = -20C to +85C TA = +25C to +85C TA = +25C to -20C (Note 2) TA = -20C to +85C (Note 3) -52 to +12 64 -25 +0.0135 -0.0135 17.8 -8 -81 0.03 -45 to +7 52 -23 +0.0167 -0.0167 17.8 -8 -80 0.03 dBm dB dBm dB/C mV/dB V/C dBm dBm/C SYMBOL CONDITIONS MIN TYP MAX UNITS
(Note 2) TA = -20C to +85C (Note 3)
dBm dB dBm dB/C mV/dB V/C dBm dBm/C
AC ELECTRICAL CHARACTERISTICS--OUTD
(Typical Application Circuit, VCC = +2.7V to +3.3V, R1 = R2 = R3 = 0, TA = -40C to +85C, unless otherwise noted. Typical values are at VCC = 3.3V, CSETL = CSETH = VCC, TA = +25C, unless otherwise noted.) (Note 1)
PARAMETER OUTD Center Point Small-Signal Envelope Bandwidth Small-Signal Settling Time SYMBOL CONDITIONS PRFINA = PRFINB No external capacitor on pins FV1 and FV2 Any 8dB change on the inputs, no external capacitor on FV1 and FV2, settling accuracy is 0.5dB Any 30dB change on the inputs, no external capacitor on pins FV1 and FV2, settling accuracy is 0.5dB Any 8dB step, no external capacitor on pins FV1 and FV2 MIN TYP 1 22 150 MAX UNITS V MHz ns
Large-Signal Settling Time
300
ns
Small-Signal Rise and Fall Time
15
ns
4
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LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements
AC ELECTRICAL CHARACTERISTICS--OUTD (continued)
(Typical Application Circuit, VCC = +2.7V to +3.3V, R1 = R2 = R3 = 0, TA = -40C to +85C, unless otherwise noted. Typical values are at VCC = 3.3V, CSETL = CSETH = VCC, TA = +25C, unless otherwise noted.) (Note 1)
PARAMETER Large-Signal Rise and Fall Time SYMBOL CONDITIONS Any 30dB step, no external capacitor on pins FV1 and FV2 0.1GHz 0.9GHz 1dB Dynamic Range 1.9GHz 2.17GHz 2.5GHz Slope OUTD Voltage Deviation PRFINB = -32dBm PRFINB = -30dBm PRFINB = -27dBm PRFINB = -25dBm PRFINB = -23dBm MIN TYP 35 80 75 60 55 50 25 0.25 80 70 55 50 45 0.2 90 65 55 dB dB dB mV/dB dB dB MAX UNITS ns
MAX2016
fRF = 0.1GHz to 2.5GHz PRFINA = PRFINB = -30dBm, TA = -20C to +85C 0.1GHz, PRFINB = -32dBm 0.9GHz, PRFINB = -30dBm
1dB Dynamic Range over Temperature Relative to Best-Fit Curve at +25C
PRFINA is swept ; TA = -20C to +85C
1.9GHz, PRFINB = -27dBm 2.17GHz, PRFINB = -25dBm 2.5GHz, PRFINB = -23dBm
Gain Measurement Balance
PRFINB = PRFINB = -50dBm to -5dBm, fRF = 1.9GHz 0.9GHz 1.9GHz 2.5GHz
Channel Isolation
The MAX2016 is tested at TA = +25C and is guaranteed by design for TA = -40C to +85C. Typical minimum and maximum range of the detector at the stated frequency. Dynamic range refers to the range over which the error remains within the 3dB range. The slope is the variation of the output voltage per change in input power. It is calculated by fitting a root-mean-square straight line to the data indicated by the RF input power range. Note 5: The intercept is an extrapolated value that corresponds to the output power for which the output voltage is zero. It is calculated by fitting a root-mean-square straight line to the data. Note 1: Note 2: Note 3: Note 4:
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LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements MAX2016
Typical Operating Characteristics
(MAX2016 EV kit, VCC = 3.3V, R1 = R2 = R3 = 0, CSETL = CSETH = VCC, TA = +25C, unless otherwise noted.)
DIFFERENTIAL OUTPUT VOLTAGE vs. A/B DIFFERENCE
MAX2016 toc01
DIFFERENTIAL OUTPUT-VOLTAGE ERROR vs. A/B DIFFERENCE
fIN = 100MHz PRFINB = -32dBm NORMALIZED TO DATA AT +25C TA = -20C 0 -1 TA = +85C
MAX2016 toc02
2.5
fIN = 100MHz PRFINB = -32dBm PRFINA IS SWEPT
3 2 1 ERROR (dB)
2.0 TA = -20C, +25C, +85C
VOUTD (V)
1.5
1.0
0.5
-2 -3 -50 -30 -10 10 30 50 -50 -30 -10 10 30 50 MAGNITUDE RATIO (dB) MAGNITUDE RATIO (dB)
0
DIFFERENTIAL OUTPUT VOLTAGE vs. A/B DIFFERENCE
MAX2016 toc03
DIFFERENTIAL OUTPUT-VOLTAGE ERROR vs. A/B DIFFERENCE
fIN = 900MHz PRFINB = -30dBm NORMALIZED TO DATA AT +25C TA = -20C 0 -1 TA = +85C
MAX2016 toc04
2.5
fIN = 900MHz PRFINB = -30dBm PRFINA IS SWEPT
3 2 1 ERROR (dB)
2.0 TA = -20C, +25C, +85C
VOUTD (V)
1.5
1.0
0.5
-2 -3 -50 -30 -10 10 30 50 -50 -30 -10 10 30 50 MAGNITUDE RATIO (dB) MAGNITUDE RATIO (dB)
0
DIFFERENTIAL OUTPUT VOLTAGE vs. A/B DIFFERENCE
MAX2016 toc05
DIFFERENTIAL OUTPUT-VOLTAGE ERROR vs. A/B DIFFERENCE
fIN = 1900MHz PRFINB = -27dBm NORMALIZED TO DATA AT +25C TA = -20C 0 -1 TA = +85C
MAX2016 toc06
2.5 TA = -20C TA = +25C VOUTD (V) 1.5 TA = +85C 1.0 fIN = 1900MHz PRFINB = -27dBm PRFINA IS SWEPT
3 2 1 ERROR (dB)
2.0
0.5
-2 -3 -40 -20 0 20 40 -40 -20 0 20 40 MAGNITUDE RATIO (dB) MAGNITUDE RATIO (dB)
0
6
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LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements
Typical Operating Characteristics (continued)
(MAX2016 EV kit, VCC = 3.3V, R1 = R2 = R3 = 0, CSETL = CSETH = VCC, TA = +25C, unless otherwise noted.)
DIFFERENTIAL OUTPUT VOLTAGE vs. A/B DIFFERENCE
MAX2016 toc07
MAX2016
DIFFERENTIAL OUTPUT-VOLTAGE ERROR vs. A/B DIFFERENCE
fIN = 2170MHz PRFINB = -25dBm NORMALIZED TO DATA AT +25C TA = -20C 0 -1
MAX2016 toc08
2.5
fIN = 2170MHz PRFINB = -25dBm PRFINA IS SWEPT TA = -20C TA = +85C TA = +25C
3 2 1 ERROR (dB)
2.0
VOUTD (V)
1.5
1.0
TA = +85C
0.5
-2 -3 -45 -25 -5 15 35 -40 -20 0 20 40 MAGNITUDE RATIO (dB) MAGNITUDE RATIO (dB)
0
DIFFERENTIAL OUTPUT VOLTAGE vs. A/B DIFFERENCE
MAX2016 toc09
DIFFERENTIAL OUTPUT-VOLTAGE ERROR vs. A/B DIFFERENCE
fIN = 2500MHz PRFINB = -23dBm NORMALIZED TO DATA AT +25C TA = -20C
MAX2016 toc10
2.5
fIN = 2500MHz PRFINB = -23dBm PRFINA IS SWEPT TA = -20C TA = +25C TA = +85C
3 2 1 ERROR (dB) 0 -1 TA = +85C
2.0
VOUTD (V)
1.5
1.0
0.5
-2 -3 -40 -20 0 20 40 -40 -20 0 20 40 MAGNITUDE RATIO (dB) MAGNITUDE RATIO (dB)
0
DIFFERENTIAL OUTPUT-VOLTAGE BALANCE
MAX2016 toc11
S11 MAGNITUDE
-15 -20 MAGNITUDE (dB) -25 -30 -35 -40 -45 -50 -55 TA = +85C TA = +25C TA = -20C
MAX2016 toc12
1.15 1.10 1.05 VOUTD (V) 1.00 TA = +85C 0.95 0.90 0.85 -60 -45 -30 PRFINA (dBm) -15 0 TA = +25C TA = -20C PRFINA = PRFINB - 5dB fIN = 1900MHz TA = +25C TA = +85C T = -20C A TA = +25C PRFINA = PRFINB + 5dB TA = +85C PRFINA = PRFINB TA = -20C
-10
-60 0 0.5 1.0 1.5 2.0 2.5 3.0 FREQUENCY (GHz)
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LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements MAX2016
Typical Operating Characteristics (continued)
(MAX2016 EV kit, VCC = 3.3V, R1 = R2 = R3 = 0, CSETL = CSETH = VCC, TA = +25C, unless otherwise noted.)
VOUTA vs. PRFINA
MAX2016 toc13
VOUTA ERROR vs. PRFINA
fIN = 100MHz NORMALIZED TO DATA AT +25C TA = -20C
MAX2016 toc14
2.5 fIN = 100MHz 2.0 TA = -20C TA = +25C TA = +85C VOUTA (V) 1.5
3 2 1 ERROR (dB) 0 -1 TA = +85C
1.0
0.5
-2 -3 -80 -60 -40 -20 0 20 -80 -60 -40 -20 0 20 PRFINA (dBm) PRFINA (dBm)
0
VOUTA vs. PRFINA
MAX2016 toc15
VOUTA ERROR vs. PRFINA
fIN = 900MHz NORMALIZED TO DATA AT +25C TA = -20C
MAX2016 toc16
2.5 fIN = 900MHz 2.0 TA = -20C TA = +25C TA = +85C
3 2 1
VOUTA (V)
1.5
ERROR (dB)
0 -1 TA = +85C
1.0
0.5
-2 -3 -80 -60 -40 -20 0 20 -75 -60 -45 -30 -15 0 15 PRFINA (dBm) PRFINA (dBm)
0
VOUTA vs. PRFINA
MAX2016 toc17
VOUTA ERROR vs. PRFINA
fIN = 1900MHz NORMALIZED TO DATA AT +25C
MAX2016 toc18
2.5 fIN = 1900MHz 2.0 TA = -20C TA = +25C
3 2 1
VOUTA (V)
1.5 TA = +85C 1.0
ERROR (dB)
0 -1 TA = +85C
TA = -20C
0.5
-2 -3 -65 -45 -25 PRFINA (dBm) -5 15 -65 -45 -25 PRFINA (dBm) -5 15
0
8
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LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements
Typical Operating Characteristics (continued)
(MAX2016 EV kit, VCC = 3.3V, R1 = R2 = R3 = 0, CSETL = CSETH = VCC, TA = +25C, unless otherwise noted.)
VOUTA vs. PRFINA
MAX2016 toc19
MAX2016
VOUTA ERROR vs. PRFINA
fIN = 2170MHz NORMALIZED TO DATA AT +25C
MAX2016 toc20
2.5 fIN = 2170MHz 2.0 TA = -20C TA = +25C VOUTA (V) 1.5 TA = +85C 1.0
3 2 1 ERROR (dB) TA = -20C 0 -1 TA = +85C
0.5
-2 -3 -60 -45 -30 -15 0 15 -60 -45 -30 -15 0 15 PRFINA (dBm) PRFINA (dBm)
0
VOUTA vs. PRFINA
MAX2016 toc21
VOUTA ERROR vs. PRFINA
fIN = 2500MHz NORMALIZED TO DATA AT +25C TA = -20C
MAX2016 toc22
2.5 fIN = 2500MHz 2.0 TA = -20C TA = +25C
3 2 1 ERROR (dB) 0 -1 -2 -3 TA = +85C
VOUTA (V)
1.5
1.0
TA = +85C
0.5
0 -60 -45 -30 -15 0 15 PRFINA (dBm)
-60
-45
-30
-15
0
15
PRFINA (dBm)
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LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements MAX2016
Pin Description
PIN 1, 28 2, 9, 12, 20 3, 4 5, 17 6 7 8 10 11 13, 14 15 16 18, 19 21, 22 23 24 25 26 27 EP NAME FA1, FA2 VCC RFINA+, RFINAGND COUTH CSETH COR SETD OUTD FV2, FV1 CSETL COUTL RFINB-, RFINB+ FB1, FB2 OUTB SETB REF SETA OUTA GND FUNCTION External Capacitor Input. Connecting a capacitor between FA1 and FA2 sets the highpass cutoff frequency corner for detector A (see the Input Highpass Filter section). Supply Voltage. Bypass with capacitors as specified in the Typical Application Circuit. Place capacitors as close to each VCC as possible (see the Power-Supply Connections section). Differential RF Inputs for Detector A. Requires external DC-blocking capacitors. Ground. Connect to the printed circuit (PC) board ground plane. High-Comparator Output Threshold Input on High Comparator Comparator OR Logic Output. Output of COUTH ORed with COUTL. Set-Point Input for Gain Detector DC Output Voltage Representing PRFINA - PRFINB. This output provides a DC voltage proportional to the difference of the input RF powers on RFINA and RFINB. Video-Filter Capacitor Inputs for OUTD Threshold Set Input on Low Comparator Low-Comparator Output Differential RF Inputs for Detector B. Requires external DC-blocking capacitors. External Capacitor Input. Connecting a capacitor between FB1 and FB2 sets the highpass cutoff frequency corner for detector B (see the Input Highpass Filter section). Detector B Output. This output provides a voltage proportional to the log of the input power on differential inputs RFINB+ and RFINB- (RFINB). Set-Point Input for Detector B 2V Reference Output Set-Point Input for Detector A Detector A Output. This output provides a voltage proportional to the log of the input power on differential inputs RFINA+ and RFINA- (RFINA). Exposed Paddle. EP must connect to the PC board ground plane.
Detailed Description
The MAX2016 dual logarithmic amplifier is designed for a multitude of applications including dual-channel RF power measurements, AGC control, gain/loss detection, and VSWR monitoring. This device measures RF signals ranging from low frequency to 2.5GHz, and operates from a single 2.7V to 5.25V (using series resistor, R6) power supply. As with its single-channel counterpart (MAX2015), the MAX2016 provides unparalleled performance with a high 80dB dynamic range at 100MHz and exceptional accuracy over the extended temperature and supply voltage ranges. The MAX2016 uses a pair of logarithmic amplifiers to detect and compare the power levels of two RF input signals. The device subtracts one power level from the other to provide a DC output voltage that is proportional
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to the power difference (gain). The MAX2016 can also measure the return loss/VSWR of an RF signal by monitoring the incident and reflected power levels associated with any given load. A window detector is easily implemented by using the on-chip comparators, OR gate, and 2V reference. This combination of circuitry provides an automatic indication of when the measured gain is outside a programmable range. Alarm monitoring can thus be implemented for detecting high-VSWR states (such as open or shorted loads).
RF Inputs (RFINA and RFINB)
The MAX2016 has two differential RF inputs. The input to detector A (RFINA) uses the two input ports RFINA+ and RFINA-, and the input to detector B (RFINB) uses the two input ports RFINB+ and RFINB-.
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LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements MAX2016
Table 1. Component Values Used in the Typical Application Circuit
DESIGNATION C1, C2, C8, C9 C3, C6, C10, C13 C4, C7, C11, C14 C5, C12, C15 C18 R1, R2, R3 R6 VALUE 680pF 33pF 0.1F Not used 10F 0 0 37.4 Microwave capacitors (0402) Microwave capacitors (0402) Microwave capacitors (0603) Capacitors are optional for frequency compensation Tantalum capacitor (C case) Resistors (0402) Resistor (1206) for VS = 2.7V to 3.6V 1% resistor (1206) for VS = 4.75V to 5.25V DESCRIPTION
The differential RF inputs allow for the measurement of broadband signals ranging from low frequency to 2.5GHz. For single-ended signals, RFINA- and RFINBare AC-coupled to ground. The RF inputs are internally biased and need to be AC-coupled. Using 680pF capacitors, as shown in the Typical Application Circuit, results in a 10MHz highpass corner frequency. An internal 50 resistor between RFINA+ and RFINA- (as well as RFINB+ and RFINB-) produces a good low-frequency to 3.0GHz match.
OUTD
OUTD is a DC voltage proportional to the difference of the input RF power levels. The change of the OUTD with respect to the power difference is 25mV/dB (R3 = 0). The difference of the input power levels (gain) can be determined by the following equation: PRFINA - PRFINB = (VOUTD - VCENTER ) SLOPE
SETA, SETB, and SETD Inputs
The SET_ inputs are used for loop control when the device is in controller mode. Likewise, these same SET_ inputs are used to set the slope of the output signal (mV/dB) when the MAX2016 is in detector mode. The center node of the internal resistor-divider is fed to the negative input of the power detector's internal output op amp.
where VCENTER is the output voltage, typically 1V, when PRFINA = PRFINB.
Applications Information
Monitoring VSWR and Return Loss
The MAX2016 can be used to measure the VSWR of an RF signal, which is useful for detecting the presence or absence of a properly loaded termination, such as an antenna (see Figure 1). The transmitted wave from the power amplifier is coupled to RFINA and to the antenna. The reflected wave from the antenna is connected to RFINB through a circulator. When the antenna is missing or damaged, a mismatch in the nominal load impedance results, leading to an increase in reflected power and subsequent change in the transmission line's VSWR. This increase in reflected power is manifested by a reduction in the voltage at OUTD. An alarm condition can be set by using the low comparator output (COUTL) as shown in Figure 1. The comparator automatically senses the change in VSWR, yielding a logic 0 as it compares OUTD to a low DC voltage at CSETL. CSETL, in turn, is set by using the internal reference voltage and an external resistor-divider network. Figure 1 illustrates a simple level detector. For windowdetector implementation, see the Comparator/Window Detector section.
Reference
The MAX2016 has an on-chip 2V voltage reference. The internal reference output is connected to REF. The output can be used as a reference voltage source for the comparators or other components and can source up to 2mA.
OUTA and OUTB
Each OUT_ is a DC voltage proportional to the RF input power level. The change of OUT_ with respect to the power input is approximately 18mV/dB (R1 = R2 = 0). The input power level can be determined by the following equation: PRFIN _ = VOUT _ SLOPE + PINT
where PINT is the extrapolated intercept point of where the output voltage intersects the horizontal axis.
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LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements MAX2016
VREF CSETL
RFINA
LOGARITHMIC DETECTOR LOGARITHMIC DETECTOR
COUTL COUTL
RFINB
COUPLER TRANSMITTER CIRCULATOR
ATTENUATOR
OUTD SETD 20k GND
OUTD
MAX2016
Figure 1. VSWR Monitoring Configuation
RFINA
LOGARITHMIC DETECTOR LOGARITHMIC DETECTOR OUTD ADC P
RFINB
SETD
MAX2016
20k
GND
IN 4-PORT DIRECTIONAL COUPLER
LOAD
Figure 2. Measuring Return Loss and VSWR of a Given Load
Measuring VSWR and Return Loss
In Figure 2, the two logarithmic amplifiers measure the incident and the reflected power levels to produce two proportional output voltages at OUTA and OUTB. Since OUTD is a DC voltage proportional to the difference of OUTA and OUTB, return loss (RL) and VSWR can be easily calculated within a microprocessor using the following relationships:
12
RL = PRFINA - PRFINB =
(VOUTD - VCENTER ) SLOPE
where return loss (RL) is expressed in decibels, V CENTER is the output voltage (typically 1V) when P RFINA = P RFINB , and SLOPE is typically equal to 25mV/dB (for R3 = 0).
______________________________________________________________________________________
LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements MAX2016
MAX2016
20k SETD
RFINA
LOGARITHMIC DETECTOR LOGARITHMIC DETECTOR
OUTD GND
OUTD
RFINB
RF BLOCK COUPLER IN COUPLER OUT
Figure 3. Gain Measurement Configuration
VSWR can similarly be calculated through the following relationship: 1 + 10 20 1 - 10 20
- RL - RL
tors. This provides a detector slope of approximately 18mV/dB with a 0.5V to 1.8V output range.
Gain-Controller Mode
The MAX2016 can be used as a gain controller within an automatic gain-control (AGC) loop. As shown in Figure 6, RFINA and RFINB monitor the VGA's input and output power levels, respectively. The MAX2016 produces a DC voltage at OUTD that is proportional to the difference in these two RF input power levels. An internal op amp compares the DC voltage with a reference voltage at SETD. The op amp increases or decreases the voltage at OUTD until OUTD equals SETD. Thus, the MAX2016 adjusts the gain of the VGA to a level determined by the voltage applied to SETD.
VSWR =
Measuring Gain
The MAX2016 can be used to measure the gain of an RF block (or combination of blocks) through the implementation outlined in Figure 3. As shown, a coupled signal from the input of the block is fed into RFINA, while the coupled output is connected to RFINB. The DC output voltage at OUTD is proportional to the power difference (i.e., gain). The gain of a complete receiver or transmitter lineup can likewise be measured since the MAX2016 accepts RF signals that range from low frequency to 2.5GHz; see Figure 4. The MAX2016 accurately measures the gain, regardless of the different frequencies present within superheterodyne architectures.
Power-Controller Mode
The MAX2016 can also be used as a power detector/controller within an AGC loop. Figure 7 depicts a scenario where the MAX2016 is employed as the AGC circuit. As shown in the figure, the MAX2016 monitors the output of the PA through a directional coupler. An internal integrator (Figure 5) compares the detected signal with a reference voltage determined by VSET_. The integrator, acting like a comparator, increases or decreases the voltage at OUT_, according to how closely the detected signal level matches the VSET_ reference. The MAX2016 maintains the power of the PA to a level determined by the voltage applied to SET_.
Measuring Power (RSSI Detector Mode)
In detector mode, the MAX2016 acts like a receive-signal-strength indicator (RSSI), which provides an output voltage proportional to the input power. This is accomplished by providing a feedback path from OUTA (OUTB) to SETA (SETB) (R1/R2 = 0; see Figure 5). By connecting SET_ directly to OUT_, the op-amp gain is set to 2V/V due to two internal 20k feedback resis-
______________________________________________________________________________________
13
LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements MAX2016
MIXER fRF COUPLER LNA LO fIF COUPLER
RFINA LOGARITHMIC DETECTOR
LOGARITHMIC RFINB DETECTOR
OUTD
OUT
MAX2016
SETD
20k
Figure 4. Conversion Gain Measurement Configuration
VGA VGA INPUT COUPLER DETECTORS RFIN+_ 20k RFIN-_ 20k GND SETA/ SETB R1/R2 SETD OUTD OUTA/ OUTB GAIN CONTROL INPUT OUTA/OUTB SET-POINT DAC VGA OUTPUT COUPLER
IN_
MAX2016
20k
MAX2016
RFINA
Figure 5. In Detector Mode (RSSI), OUTA/OUTB is a DC Voltage Proportional to the Input Power (Note: Only one detector channel is shown within the figure. Since the MAX2016 is a dual detector, the second channel can be easily implemented by using the adjacent set of input and output connections.)
LOGARITHMIC DETECTOR
LOGARITHMIC DETECTOR
RFINB
Figure 6. In Gain-Controller Mode, the OUTD Maintains the Gain of the VGA
14
______________________________________________________________________________________
LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements
OUTA and OUTB Slope Adjustment
The transfer slope function of OUTA and OUTB can be increased from its nominal value by varying resistors R1 and R2 (see the Typical Application Circuit). The equation controlling the slope is: mV SLOPE OUTA OR OUTB = 9 dB (R1 or R2) + 40k 20k
MAX2016
POWER AMPLIFIER TRANSMITTER COUPLER GAIN-CONTROL INPUT RFINA/ LOGARITHMIC RFINB DETECTOR
OUTD Slope Adjustment
The transfer slope function of OUTD can be increased from its nominal value by varying resistor R3 (see the Typical Application Circuit). The equation controlling the slope is: mV R3 + 20k SLOPE OUTD = 25 dB 20k
OUTA/ OUTB SETA/ SETB 20k
SET-POINT DAC
20k
Input Highpass Filters
The MAX2016 integrates a programmable highpass filter on each RF input. The lower cutoff frequency of the MAX2016 can be decreased by increasing the external capacitor value between FA1 and FA2 or FB1 and FB2. By default, with no capacitor connecting FA1 and FA2 or FB1 and FB2, the lower cutoff frequency is 20MHz. Using the following equation determines the lowest operating frequency: frequency = where R = 2. 1 2RC
MAX2016
Figure 7. In Power-Controller Mode, the DC Voltage at OUTA or OUTB Controls the Gain of the PA, Leading to a Constant Output Power Level (Note: Only one controller channel is shown within the figure. Since the MAX2016 is a dual controller/detector, the second channel can be easily implemented by using the adjacent set of input and output connections.)
Differential Output Video Filter
The bandwidth and response time difference of the output amplifier can be controlled with the external capacitor, C15, connected between FV1 and FV2. With no external capacitor, the bandwidth is greater than 20MHz. The following equation determines the bandwidth of the amplifier difference: frequency = where R = 1.8k. 1 2RC
minimum gain while the upper comparator (CSETH, COUTH) monitors the maximum gain. See the window detector shown in Figure 8. The outputs of each comparator can be monitored independently or from the COR output, which ORs the outputs of each comparator making a window detector. If the difference between the two RF input powers (gain) are within the set range, COR is a logic 0. If the gain of the RF inputs is too high or too low, the COR output is a logic 1. These comparators can be used to trigger hardware interrupts allowing rapid detection of overrange conditions.
Power-Supply Connection
The MAX2016 is designed to operate from a single +2.7V to +3.6V supply. To operate under a higher supply voltage range, a resistor must be connected in series with the power supply and VCC to reduce the voltage delivered to the chip. For a +4.75V to +5.25V supply, use a 37.4 (1%) resistor in series with the supply.
Comparators/Window Detectors
The MAX2016 integrates two comparators for use in monitoring the difference in power levels (gain) of RFINA and RFINB. The thresholds of the comparators are set to the voltage applied to CSETL and CSETH. The lower comparator (CSETL, COUTL) monitors the
Layout Considerations
A properly designed PC board is an essential part of any RF/microwave circuit. Keep RF signal lines as short
15
______________________________________________________________________________________
LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements MAX2016
CSETH
MAX2016
COR RFINA LOGARITHMIC DETECTOR CSETL RFINB LOGARITHMIC DETECTOR OUTD
SETD 20k
COUPLER
RF BLOCK COUPLER OUT
IN
Figure 8. Window Comparators Monitoring Mode. COR goes high if OUTD drops below CSETL or rises above CSETH.
as possible to reduce losses, radiation, and inductance. For the best performance, route the ground pin traces directly to the exposed pad under the package. The PC board exposed pad MUST be connected to the ground plane of the PC board. It is suggested that multiple vias be used to connect this pad to the lower level ground planes. This method provides a good RF/thermal conduction path for the device. Solder the exposed pad on the bottom of the device package to the PC board. The MAX2016 Evaluation Kit can be used as a reference for board layout. Gerber files are available upon request at www.maxim-ic.com.
Exposed Pad RF/Thermal Considerations
The exposed paddle (EP) of the MAX2016's 28-pin thin QFN-EP package provides two functions. One is a low thermal-resistance path to the die; the second is a lowRF impedance ground connection. The EP MUST be soldered to a ground plane on the PC board, either directly or through an array of plated via holes (minimum of four holes to provide ground integrity).
Power-Supply Bypassing
Proper voltage-supply bypassing is essential for highfrequency circuit stability. Bypass each VCC pin with a capacitor as close to the pin as possible (Typical Application Circuit).
16
______________________________________________________________________________________
LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements
Functional Diagram
MAX2016
2, 9, 12, 20
26 SETA VCC 20k 20k
27 OUTA
25 REF
23 OUTB
24 SETB
2.0V REF
20k
20k
5, 17
GND
3 RFINA+
RFINB+ 19
50 4 RFINA1 FA1 28 FA2
LOG AMPLIFIERS
LOG AMPLIFIERS
50 RFINB- 18
EXPOSED PAD
FB1 21 FB2 22
MAX2016
FV1 14 FV2 13 8 COR 20k
CSETH 7
COUTH 6
COUTL 16
CSETL 15
OUTD SETD 11 10
______________________________________________________________________________________
17
LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements MAX2016
Typical Application Circuit
VOUTA VREF VOUTB R6 VS C12 28 C4 C3 C1 RFINA C2 COMPARATORA VCC FA2 1 2 3 4 5 6 7 27 OUTA 26 SETA 25 REF 24 SETB 23 OUTB 22 FB2 21 20 19 18 17 16 15 C9 COMPARATORB VCC C8 RFINB C10 C11 VCC C18
VCC
R1 R2 VCC C5
FA1 VCC RFINA+ RFINAGND COUTH CSETH OUTD SETD COR VCC VCC FV2 FV1 14 EXPOSED PADDLE
FB1 VCC RFINB+
MAX2016
RFINBGND COUTL CSETL
8 A+B VCC
9
10
11
12
13
C15 VCC
C7
C6
C13
C14
R3 NOTE: COMPARATORS ARE DISABLED BY CONNECTING CSETL AND CSETH TO VCC. VOUTD
Chip Information
PROCESS: BiCMOS
18
______________________________________________________________________________________
LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
QFN THIN.EPS
MAX2016 MAX2016
0.15 C A
D2
C L
D D/2
0.15 C B
b D2/2
0.10 M C A B
k
MARKING
XXXXX
E/2 E2/2 E (NE-1) X e
C L
E2
k L
PIN # 1 I.D.
DETAIL A
e (ND-1) X e
PIN # 1 I.D. 0.35x45 DETAIL B
e
L1
L
C L
C L
L
L
e 0.10 C A 0.08 C
e
C
A1 A3 PACKAGE OUTLINE, 16, 20, 28, 32L THIN QFN, 5x5x0.8mm
-DRAWING NOT TO SCALE-
21-0140
F
1
2
COMMON DIMENSIONS PKG. 32L 5x5 16L 5x5 20L 5x5 28L 5x5 SYMBOL MIN. NOM. MAX. MIN. NOM. MAX. MIN. NOM. MAX. MIN. NOM. MAX. A A1 A3 b D E e k L L1 N ND NE JEDEC 0.70 0.75 0.80 0.70 0.75 0.80 0.70 0.75 0.80 0.70 0.75 0.80 0 0.02 0.05 0.20 REF. 0 0.02 0.05 0.20 REF. 0 0.02 0.05 0.20 REF. 0 0.02 0.05 0.20 REF. PKG. CODES T1655-1 T1655-2 T1655N-1 T2055-2 T2055-3 T2055-4 T2055-5 T2855-1 T2855-2 T2855-3 T2855-4 T2855-5 T2855-6 T2855-7 T2855-8 T2855N-1 T3255-2 T3255-3 T3255-4 T3255N-1
EXPOSED PAD VARIATIONS
D2
MIN. NOM. MAX. MIN.
E2
NOM. MAX.
L
0.15
DOWN BONDS ALLOWED
3.00 3.00 3.00 3.00 3.00 3.00 3.15 3.15 2.60 3.15 2.60 2.60 3.15 2.60 3.15 3.15 3.00 3.00 3.00 3.00
3.10 3.20 3.00 3.10 3.20 3.00 3.10 3.20 3.00 3.10 3.20 3.00 3.10 3.20 3.00 3.10 3.20 3.00 3.25 3.25 2.70 3.25 2.70 2.70 3.25 2.70 3.25 3.25 3.10 3.10 3.10 3.10 3.35 3.35 2.80 3.35 2.80 2.80 3.35 2.80 3.35 3.35 3.20 3.20 3.20 3.20 3.15 3.15 2.60 3.15 2.60 2.60 3.15 2.60 3.15 3.15 3.00 3.00 3.00 3.00
3.10 3.20 3.10 3.20 3.10 3.20 3.10 3.10 3.10 3.25 3.25 2.70 3.25 2.70 2.70 3.25 2.70 3.25 3.25 3.10 3.10 3.10 3.10 3.20 3.20 3.20 3.35 3.35 2.80 3.35 2.80 2.80 3.35 2.80 3.35 3.35 3.20 3.20 3.20 3.20
0.25 0.30 0.35 0.25 0.30 0.35 0.20 0.25 0.30 0.20 0.25 0.30 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 0.80 BSC. 0.65 BSC. 0.50 BSC. 0.50 BSC. 0.25 - 0.25 - 0.25 - 0.25 0.30 0.40 0.50 0.45 0.55 0.65 0.45 0.55 0.65 0.30 0.40 0.50 16 4 4 WHHB 20 5 5 WHHC 28 7 7 WHHD-1 32 8 8 WHHD-2 -
** ** ** ** ** ** 0.40 ** ** ** ** ** ** ** 0.40 ** ** ** ** **
NO YES NO NO YES NO Y NO NO YES YES NO NO YES Y N NO YES NO NO
NOTES: 1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994. 2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES. 3. N IS THE TOTAL NUMBER OF TERMINALS. 4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO JESD 95-1 SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE.
** SEE COMMON DIMENSIONS TABLE
5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.25 mm AND 0.30 mm FROM TERMINAL TIP. 6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY. 7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION. 8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS. 9. DRAWING CONFORMS TO JEDEC MO220, EXCEPT EXPOSED PAD DIMENSION FOR T2855-1, T2855-3 AND T2855-6. 10. WARPAGE SHALL NOT EXCEED 0.10 mm. 11. MARKING IS FOR PACKAGE ORIENTATION REFERENCE ONLY. 12. NUMBER OF LEADS SHOWN ARE FOR REFERENCE ONLY. PACKAGE OUTLINE, 16, 20, 28, 32L THIN QFN, 5x5x0.8mm
-DRAWING NOT TO SCALE-
21-0140
F
2
2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 19 (c) 2004 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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